PAL_CACHE_CHECK_INFO Struct Reference


Data Fields

UINT64 Operation:4
UINT64 FailedCacheLevel:2
UINT64 Reserved1:2
UINT64 FailedInDataPart:1
 Bit8, Failure located in the data part of the cache line.
UINT64 FailedInTagPart:1
 Bit9, Failure located in the tag part of the cache line.
UINT64 FailedInDataCache:1
 Bit10, Failure located in the data cache.
UINT64 FailedInInsCache:1
UINT64 Mesi:3
UINT64 MesiIsValid:1
UINT64 FailedWay:5
UINT64 WayIndexIsValid:1
UINT64 Reserved2:1
UINT64 MultipleBitsError:1
UINT64 Reserved3:8
UINT64 IndexOfCacheLineError:20
UINT64 Reserved4:2
UINT64 InstructionSet:1
UINT64 InstructionSetIsValid:1
UINT64 PrivilegeLevel:2
UINT64 PrivilegeLevelIsValide:1
UINT64 McCorrected:1
UINT64 TargetAddressIsValid:1
UINT64 RequesterIdentifier:1
UINT64 ResponserIdentifier:1
UINT64 PreciseInsPointer:1

Field Documentation

Bit5:4 Level of cache where the error occurred. A value of 0 indicates the first level of cache.

Bit10, Failure located in the data cache.

Bit8, Failure located in the data part of the cache line.

Bit11, Failure located in the instruction cache.

Bit9, Failure located in the tag part of the cache line.

Bit20:16, Failure located in the way of the cache indicated by this value.

Bit51:32, Index of the cache line where the error occurred.

Bit54, Instruction set. If this value is set to zero, the instruction that generated the machine check was an Intel Itanium instruction. If this bit is set to one, the instruction that generated the machine check was IA-32 instruction.

Bit55, The is field in the cache_check parameter is valid.

Bit59, Machine check corrected: This bit is set to one to indicate that the machine check has been corrected.

Bit14:12, 0 - cache line is invalid. 1 - cache line is held shared. 2 - cache line is held exclusive. 3 - cache line is modified. All other values are reserved.

Bit15, The mesi field in the cache_check parameter is valid.

Bit23, A multiple-bit error was detected, and data was poisoned for the corresponding cache line during castout.

Bit3:0, Type of cache operation that caused the machine check: 0 - unknown or internal error 1 - load 2 - store 3 - instruction fetch or instruction prefetch 4 - data prefetch (both hardware and software) 5 - snoop (coherency check) 6 - cast out (explicit or implicit write-back of a cache line) 7 - move in (cache line fill)

Bit63, Precise instruction pointer. This bit is set to one to indicate that a valid precise instruction pointer has been logged.

Bit57:56, Privilege level. The privilege level of the instruction bundle responsible for generating the machine check.

Bit58, The pl field of the cache_check parameter is valid.

Bit61, Requester identifier: This bit is set to one to indicate that a valid requester identifier has been logged.

Bit62, Responder identifier: This bit is set to one to indicate that a valid responder identifier has been logged.

Bit60, Target address is valid: This bit is set to one to indicate that a valid target address has been logged.

Bit21, The way and index field in the cache_check parameter is valid.


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