Defines | |
#define | PCILIB_TO_COMMON_ADDRESS(Address) ((UINT64) ((((UINTN) ((Address>>20) & 0xff)) << 24) + (((UINTN) ((Address>>15) & 0x1f)) << 16) + (((UINTN) ((Address>>12) & 0x07)) << 8) + ((UINTN) (Address & 0xfff )))) |
Functions | |
VOID | InternalSavePciWriteValueToBootScript (IN S3_BOOT_SCRIPT_LIB_WIDTH Width, IN UINTN Address, IN VOID *Buffer) |
UINT8 | InternalSavePciWrite8ValueToBootScript (IN UINTN Address, IN UINT8 Value) |
UINT8 EFIAPI | S3PciRead8 (IN UINTN Address) |
UINT8 EFIAPI | S3PciWrite8 (IN UINTN Address, IN UINT8 Value) |
UINT8 EFIAPI | S3PciOr8 (IN UINTN Address, IN UINT8 OrData) |
UINT8 EFIAPI | S3PciAnd8 (IN UINTN Address, IN UINT8 AndData) |
UINT8 EFIAPI | S3PciAndThenOr8 (IN UINTN Address, IN UINT8 AndData, IN UINT8 OrData) |
UINT8 EFIAPI | S3PciBitFieldRead8 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit) |
UINT8 EFIAPI | S3PciBitFieldWrite8 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 Value) |
UINT8 EFIAPI | S3PciBitFieldOr8 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 OrData) |
UINT8 EFIAPI | S3PciBitFieldAnd8 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 AndData) |
UINT8 EFIAPI | S3PciBitFieldAndThenOr8 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 AndData, IN UINT8 OrData) |
UINT16 | InternalSavePciWrite16ValueToBootScript (IN UINTN Address, IN UINT16 Value) |
UINT16 EFIAPI | S3PciRead16 (IN UINTN Address) |
UINT16 EFIAPI | S3PciWrite16 (IN UINTN Address, IN UINT16 Value) |
UINT16 EFIAPI | S3PciOr16 (IN UINTN Address, IN UINT16 OrData) |
UINT16 EFIAPI | S3PciAnd16 (IN UINTN Address, IN UINT16 AndData) |
UINT16 EFIAPI | S3PciAndThenOr16 (IN UINTN Address, IN UINT16 AndData, IN UINT16 OrData) |
UINT16 EFIAPI | S3PciBitFieldRead16 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit) |
UINT16 EFIAPI | S3PciBitFieldWrite16 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 Value) |
UINT16 EFIAPI | S3PciBitFieldOr16 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 OrData) |
UINT16 EFIAPI | S3PciBitFieldAnd16 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData) |
UINT16 EFIAPI | S3PciBitFieldAndThenOr16 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData, IN UINT16 OrData) |
UINT32 | InternalSavePciWrite32ValueToBootScript (IN UINTN Address, IN UINT32 Value) |
UINT32 EFIAPI | S3PciRead32 (IN UINTN Address) |
UINT32 EFIAPI | S3PciWrite32 (IN UINTN Address, IN UINT32 Value) |
UINT32 EFIAPI | S3PciOr32 (IN UINTN Address, IN UINT32 OrData) |
UINT32 EFIAPI | S3PciAnd32 (IN UINTN Address, IN UINT32 AndData) |
UINT32 EFIAPI | S3PciAndThenOr32 (IN UINTN Address, IN UINT32 AndData, IN UINT32 OrData) |
UINT32 EFIAPI | S3PciBitFieldRead32 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit) |
UINT32 EFIAPI | S3PciBitFieldWrite32 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 Value) |
UINT32 EFIAPI | S3PciBitFieldOr32 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 OrData) |
UINT32 EFIAPI | S3PciBitFieldAnd32 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 AndData) |
UINT32 EFIAPI | S3PciBitFieldAndThenOr32 (IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 AndData, IN UINT32 OrData) |
UINTN EFIAPI | S3PciReadBuffer (IN UINTN StartAddress, IN UINTN Size, OUT VOID *Buffer) |
UINTN EFIAPI | S3PciWriteBuffer (IN UINTN StartAddress, IN UINTN Size, IN VOID *Buffer) |
Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#define PCILIB_TO_COMMON_ADDRESS | ( | Address | ) | ((UINT64) ((((UINTN) ((Address>>20) & 0xff)) << 24) + (((UINTN) ((Address>>15) & 0x1f)) << 16) + (((UINTN) ((Address>>12) & 0x07)) << 8) + ((UINTN) (Address & 0xfff )))) |
Referenced by InternalSavePciWriteValueToBootScript(), S3PciReadBuffer(), and S3PciWriteBuffer().
Saves a 16-bit PCI configuration value to the boot script.
This internal worker function saves a 16-bit PCI configuration value in the S3 script to be replayed on S3 resume.
If the saving process fails, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. | |
Value | The value to write. |
References InternalSavePciWriteValueToBootScript(), and S3BootScriptWidthUint16.
Referenced by S3PciAnd16(), S3PciAndThenOr16(), S3PciBitFieldAnd16(), S3PciBitFieldAndThenOr16(), S3PciBitFieldOr16(), S3PciBitFieldRead16(), S3PciBitFieldWrite16(), S3PciOr16(), S3PciRead16(), and S3PciWrite16().
Saves a 32-bit PCI configuration value to the boot script.
This internal worker function saves a 32-bit PCI configuration value in the S3 script to be replayed on S3 resume.
If the saving process fails, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. | |
Value | The value to write. |
References InternalSavePciWriteValueToBootScript(), and S3BootScriptWidthUint32.
Referenced by S3PciAnd32(), S3PciAndThenOr32(), S3PciBitFieldAnd32(), S3PciBitFieldAndThenOr32(), S3PciBitFieldOr32(), S3PciBitFieldRead32(), S3PciBitFieldWrite32(), S3PciOr32(), S3PciRead32(), and S3PciWrite32().
Saves an 8-bit PCI configuration value to the boot script.
This internal worker function saves an 8-bit PCI configuration value in the S3 script to be replayed on S3 resume.
If the saving process fails, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. | |
Value | The value saved to boot script. |
References InternalSavePciWriteValueToBootScript(), and S3BootScriptWidthUint8.
Referenced by S3PciAnd8(), S3PciAndThenOr8(), S3PciBitFieldAnd8(), S3PciBitFieldAndThenOr8(), S3PciBitFieldOr8(), S3PciBitFieldRead8(), S3PciBitFieldWrite8(), S3PciOr8(), S3PciRead8(), and S3PciWrite8().
VOID InternalSavePciWriteValueToBootScript | ( | IN S3_BOOT_SCRIPT_LIB_WIDTH | Width, | |
IN UINTN | Address, | |||
IN VOID * | Buffer | |||
) |
Saves a PCI configuration value to the boot script.
This internal worker function saves a PCI configuration value in the S3 script to be replayed on S3 resume.
If the saving process fails, then ASSERT().
Width | The width of PCI configuration. | |
Address | Address that encodes the PCI Bus, Device, Function and Register. | |
Buffer | The buffer containing value. |
References ASSERT, PCILIB_TO_COMMON_ADDRESS, RETURN_SUCCESS, and S3BootScriptSavePciCfgWrite().
Referenced by InternalSavePciWrite16ValueToBootScript(), InternalSavePciWrite32ValueToBootScript(), and InternalSavePciWrite8ValueToBootScript().
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value and saves the value in the S3 script to be replayed on S3 resume.
Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. | |
AndData | The value to AND with the PCI configuration register. |
References InternalSavePciWrite16ValueToBootScript(), and PciAnd16().
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value and saves the value in the S3 script to be replayed on S3 resume.
Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. | |
AndData | The value to AND with the PCI configuration register. |
References InternalSavePciWrite32ValueToBootScript(), and PciAnd32().
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value and saves the value in the S3 script to be replayed on S3 resume.
Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.
If Address > 0x0FFFFFFF, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. | |
AndData | The value to AND with the PCI configuration register. |
References InternalSavePciWrite8ValueToBootScript(), and PciAnd8().
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value, followed a bitwise OR with another 16-bit value and saves the value in the S3 script to be replayed on S3 resume.
Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, performs a bitwise OR between the result of the AND operation and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. | |
AndData | The value to AND with the PCI configuration register. | |
OrData | The value to OR with the result of the AND operation. |
References InternalSavePciWrite16ValueToBootScript(), and PciAndThenOr16().
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value, followed a bitwise OR with another 32-bit value and saves the value in the S3 script to be replayed on S3 resume.
Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, performs a bitwise OR between the result of the AND operation and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. | |
AndData | The value to AND with the PCI configuration register. | |
OrData | The value to OR with the result of the AND operation. |
References InternalSavePciWrite32ValueToBootScript(), and PciAndThenOr32().
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value, followed a bitwise OR with another 8-bit value and saves the value in the S3 script to be replayed on S3 resume.
Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, performs a bitwise OR between the result of the AND operation and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.
If Address > 0x0FFFFFFF, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. | |
AndData | The value to AND with the PCI configuration register. | |
OrData | The value to OR with the result of the AND operation. |
References InternalSavePciWrite8ValueToBootScript(), and PciAndThenOr8().
UINT16 EFIAPI S3PciBitFieldAnd16 | ( | IN UINTN | Address, | |
IN UINTN | StartBit, | |||
IN UINTN | EndBit, | |||
IN UINT16 | AndData | |||
) |
Reads a bit field in a 16-bit PCI configuration register, performs a bitwise AND, and writes the result back to the bit field in the 16-bit register and saves the value in the S3 script to be replayed on S3 resume.
Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in AndData are stripped.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
Address | PCI configuration register to write. | |
StartBit | The ordinal of the least significant bit in the bit field. Range 0..15. | |
EndBit | The ordinal of the most significant bit in the bit field. Range 0..15. | |
AndData | The value to AND with the PCI configuration register. |
References InternalSavePciWrite16ValueToBootScript(), and PciBitFieldAnd16().
UINT32 EFIAPI S3PciBitFieldAnd32 | ( | IN UINTN | Address, | |
IN UINTN | StartBit, | |||
IN UINTN | EndBit, | |||
IN UINT32 | AndData | |||
) |
Reads a bit field in a 32-bit PCI configuration register, performs a bitwise AND, and writes the result back to the bit field in the 32-bit register and saves the value in the S3 script to be replayed on S3 resume.
Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in AndData are stripped.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
Address | PCI configuration register to write. | |
StartBit | The ordinal of the least significant bit in the bit field. Range 0..31. | |
EndBit | The ordinal of the most significant bit in the bit field. Range 0..31. | |
AndData | The value to AND with the PCI configuration register. |
References InternalSavePciWrite32ValueToBootScript(), and PciBitFieldAnd32().
UINT8 EFIAPI S3PciBitFieldAnd8 | ( | IN UINTN | Address, | |
IN UINTN | StartBit, | |||
IN UINTN | EndBit, | |||
IN UINT8 | AndData | |||
) |
Reads a bit field in an 8-bit PCI configuration register, performs a bitwise AND, and writes the result back to the bit field in the 8-bit register and saves the value in the S3 script to be replayed on S3 resume.
Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in AndData are stripped.
If Address > 0x0FFFFFFF, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
Address | PCI configuration register to write. | |
StartBit | The ordinal of the least significant bit in the bit field. Range 0..7. | |
EndBit | The ordinal of the most significant bit in the bit field. Range 0..7. | |
AndData | The value to AND with the PCI configuration register. |
References InternalSavePciWrite8ValueToBootScript(), and PciBitFieldAnd8().
UINT16 EFIAPI S3PciBitFieldAndThenOr16 | ( | IN UINTN | Address, | |
IN UINTN | StartBit, | |||
IN UINTN | EndBit, | |||
IN UINT16 | AndData, | |||
IN UINT16 | OrData | |||
) |
Reads a bit field in a 16-bit Address, performs a bitwise AND followed by a bitwise OR, and writes the result back to the bit field in the 16-bit port and saves the value in the S3 script to be replayed on S3 resume.
Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND followed by a bitwise OR between the read result and the value specified by AndData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in both AndData and OrData are stripped.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
Address | PCI configuration register to write. | |
StartBit | The ordinal of the least significant bit in the bit field. Range 0..15. | |
EndBit | The ordinal of the most significant bit in the bit field. Range 0..15. | |
AndData | The value to AND with the PCI configuration register. | |
OrData | The value to OR with the result of the AND operation. |
References InternalSavePciWrite16ValueToBootScript(), and PciBitFieldAndThenOr16().
UINT32 EFIAPI S3PciBitFieldAndThenOr32 | ( | IN UINTN | Address, | |
IN UINTN | StartBit, | |||
IN UINTN | EndBit, | |||
IN UINT32 | AndData, | |||
IN UINT32 | OrData | |||
) |
Reads a bit field in a 32-bit Address, performs a bitwise AND followed by a bitwise OR, and writes the result back to the bit field in the 32-bit port and saves the value in the S3 script to be replayed on S3 resume.
Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND followed by a bitwise OR between the read result and the value specified by AndData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in both AndData and OrData are stripped.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
Address | PCI configuration register to write. | |
StartBit | The ordinal of the least significant bit in the bit field. Range 0..31. | |
EndBit | The ordinal of the most significant bit in the bit field. Range 0..31. | |
AndData | The value to AND with the PCI configuration register. | |
OrData | The value to OR with the result of the AND operation. |
References InternalSavePciWrite32ValueToBootScript(), and PciBitFieldAndThenOr32().
UINT8 EFIAPI S3PciBitFieldAndThenOr8 | ( | IN UINTN | Address, | |
IN UINTN | StartBit, | |||
IN UINTN | EndBit, | |||
IN UINT8 | AndData, | |||
IN UINT8 | OrData | |||
) |
Reads a bit field in an 8-bit Address, performs a bitwise AND followed by a bitwise OR, and writes the result back to the bit field in the 8-bit port and saves the value in the S3 script to be replayed on S3 resume.
Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND followed by a bitwise OR between the read result and the value specified by AndData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in both AndData and OrData are stripped.
If Address > 0x0FFFFFFF, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
Address | PCI configuration register to write. | |
StartBit | The ordinal of the least significant bit in the bit field. Range 0..7. | |
EndBit | The ordinal of the most significant bit in the bit field. Range 0..7. | |
AndData | The value to AND with the PCI configuration register. | |
OrData | The value to OR with the result of the AND operation. |
References InternalSavePciWrite8ValueToBootScript(), and PciBitFieldAndThenOr8().
UINT16 EFIAPI S3PciBitFieldOr16 | ( | IN UINTN | Address, | |
IN UINTN | StartBit, | |||
IN UINTN | EndBit, | |||
IN UINT16 | OrData | |||
) |
Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and writes the result back to the bit field in the 16-bit port and saves the value in the S3 script to be replayed on S3 resume.
Reads the 16-bit PCI configuration register specified by Address, performs a bitwise OR between the read result and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in OrData are stripped.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
Address | PCI configuration register to write. | |
StartBit | The ordinal of the least significant bit in the bit field. Range 0..15. | |
EndBit | The ordinal of the most significant bit in the bit field. Range 0..15. | |
OrData | The value to OR with the PCI configuration register. |
References InternalSavePciWrite16ValueToBootScript(), and PciBitFieldOr16().
UINT32 EFIAPI S3PciBitFieldOr32 | ( | IN UINTN | Address, | |
IN UINTN | StartBit, | |||
IN UINTN | EndBit, | |||
IN UINT32 | OrData | |||
) |
Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and writes the result back to the bit field in the 32-bit port and saves the value in the S3 script to be replayed on S3 resume.
Reads the 32-bit PCI configuration register specified by Address, performs a bitwise OR between the read result and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in OrData are stripped.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
Address | PCI configuration register to write. | |
StartBit | The ordinal of the least significant bit in the bit field. Range 0..31. | |
EndBit | The ordinal of the most significant bit in the bit field. Range 0..31. | |
OrData | The value to OR with the PCI configuration register. |
References InternalSavePciWrite32ValueToBootScript(), and PciBitFieldOr32().
UINT8 EFIAPI S3PciBitFieldOr8 | ( | IN UINTN | Address, | |
IN UINTN | StartBit, | |||
IN UINTN | EndBit, | |||
IN UINT8 | OrData | |||
) |
Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and writes the result back to the bit field in the 8-bit port and saves the value in the S3 script to be replayed on S3 resume.
Reads the 8-bit PCI configuration register specified by Address, performs a bitwise OR between the read result and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized. Extra left bits in OrData are stripped.
If Address > 0x0FFFFFFF, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
Address | PCI configuration register to write. | |
StartBit | The ordinal of the least significant bit in the bit field. Range 0..7. | |
EndBit | The ordinal of the most significant bit in the bit field. Range 0..7. | |
OrData | The value to OR with the PCI configuration register. |
References InternalSavePciWrite8ValueToBootScript(), and PciBitFieldOr8().
Reads a bit field of a PCI configuration register and saves the value in the S3 script to be replayed on S3 resume.
Reads the bit field in a 16-bit PCI configuration register. The bit field is specified by the StartBit and the EndBit. The value of the bit field is returned.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT().
Address | PCI configuration register to read. | |
StartBit | The ordinal of the least significant bit in the bit field. Range 0..15. | |
EndBit | The ordinal of the most significant bit in the bit field. Range 0..15. |
References InternalSavePciWrite16ValueToBootScript(), and PciBitFieldRead16().
Reads a bit field of a PCI configuration register and saves the value in the S3 script to be replayed on S3 resume.
Reads the bit field in a 32-bit PCI configuration register. The bit field is specified by the StartBit and the EndBit. The value of the bit field is returned.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT().
Address | PCI configuration register to read. | |
StartBit | The ordinal of the least significant bit in the bit field. Range 0..31. | |
EndBit | The ordinal of the most significant bit in the bit field. Range 0..31. |
References InternalSavePciWrite32ValueToBootScript(), and PciBitFieldRead32().
Reads a bit field of a PCI configuration register and saves the value in the S3 script to be replayed on S3 resume.
Reads the bit field in an 8-bit PCI configuration register. The bit field is specified by the StartBit and the EndBit. The value of the bit field is returned.
If Address > 0x0FFFFFFF, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT().
Address | PCI configuration register to read. | |
StartBit | The ordinal of the least significant bit in the bit field. Range 0..7. | |
EndBit | The ordinal of the most significant bit in the bit field. Range 0..7. |
References InternalSavePciWrite8ValueToBootScript(), and PciBitFieldRead8().
UINT16 EFIAPI S3PciBitFieldWrite16 | ( | IN UINTN | Address, | |
IN UINTN | StartBit, | |||
IN UINTN | EndBit, | |||
IN UINT16 | Value | |||
) |
Writes a bit field to a PCI configuration register and saves the value in the S3 script to be replayed on S3 resume.
Writes Value to the bit field of the PCI configuration register. The bit field is specified by the StartBit and the EndBit. All other bits in the destination PCI configuration register are preserved. The new value of the 16-bit register is returned.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
Address | PCI configuration register to write. | |
StartBit | The ordinal of the least significant bit in the bit field. Range 0..15. | |
EndBit | The ordinal of the most significant bit in the bit field. Range 0..15. | |
Value | New value of the bit field. |
References InternalSavePciWrite16ValueToBootScript(), and PciBitFieldWrite16().
UINT32 EFIAPI S3PciBitFieldWrite32 | ( | IN UINTN | Address, | |
IN UINTN | StartBit, | |||
IN UINTN | EndBit, | |||
IN UINT32 | Value | |||
) |
Writes a bit field to a PCI configuration register and saves the value in the S3 script to be replayed on S3 resume.
Writes Value to the bit field of the PCI configuration register. The bit field is specified by the StartBit and the EndBit. All other bits in the destination PCI configuration register are preserved. The new value of the 32-bit register is returned.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
Address | PCI configuration register to write. | |
StartBit | The ordinal of the least significant bit in the bit field. Range 0..31. | |
EndBit | The ordinal of the most significant bit in the bit field. Range 0..31. | |
Value | New value of the bit field. |
References InternalSavePciWrite32ValueToBootScript(), and PciBitFieldWrite32().
UINT8 EFIAPI S3PciBitFieldWrite8 | ( | IN UINTN | Address, | |
IN UINTN | StartBit, | |||
IN UINTN | EndBit, | |||
IN UINT8 | Value | |||
) |
Writes a bit field to a PCI configuration register and saves the value in the S3 script to be replayed on S3 resume.
Writes Value to the bit field of the PCI configuration register. The bit field is specified by the StartBit and the EndBit. All other bits in the destination PCI configuration register are preserved. The new value of the 8-bit register is returned.
If Address > 0x0FFFFFFF, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
Address | PCI configuration register to write. | |
StartBit | The ordinal of the least significant bit in the bit field. Range 0..7. | |
EndBit | The ordinal of the most significant bit in the bit field. Range 0..7. | |
Value | New value of the bit field. |
References InternalSavePciWrite8ValueToBootScript(), and PciBitFieldWrite8().
Performs a bitwise OR of a 16-bit PCI configuration register with a 16-bit value and saves the value in the S3 script to be replayed on S3 resume.
Reads the 16-bit PCI configuration register specified by Address, performs a bitwise OR between the read result and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. | |
OrData | The value to OR with the PCI configuration register. |
References InternalSavePciWrite16ValueToBootScript(), and PciOr16().
Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit value and saves the value in the S3 script to be replayed on S3 resume.
Reads the 32-bit PCI configuration register specified by Address, performs a bitwise OR between the read result and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. | |
OrData | The value to OR with the PCI configuration register. |
References InternalSavePciWrite32ValueToBootScript(), and PciOr32().
Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value and saves the value in the S3 script to be replayed on S3 resume.
Reads the 8-bit PCI configuration register specified by Address, performs a bitwise OR between the read result and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are serialized.
If Address > 0x0FFFFFFF, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. | |
OrData | The value to OR with the PCI configuration register. |
References InternalSavePciWrite8ValueToBootScript(), and PciOr8().
Reads a 16-bit PCI configuration register and saves the value in the S3 script to be replayed on S3 resume.
Reads and returns the 16-bit PCI configuration register specified by Address. This function must guarantee that all PCI read and write operations are serialized.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. |
References InternalSavePciWrite16ValueToBootScript(), and PciRead16().
Reads a 32-bit PCI configuration register and saves the value in the S3 script to be replayed on S3 resume.
Reads and returns the 32-bit PCI configuration register specified by Address. This function must guarantee that all PCI read and write operations are serialized.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. |
References InternalSavePciWrite32ValueToBootScript(), and PciRead32().
Reads an 8-bit PCI configuration register and saves the value in the S3 script to be replayed on S3 resume.
Reads and returns the 8-bit PCI configuration register specified by Address. This function must guarantee that all PCI read and write operations are serialized.
If Address > 0x0FFFFFFF, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. |
References InternalSavePciWrite8ValueToBootScript(), and PciRead8().
UINTN EFIAPI S3PciReadBuffer | ( | IN UINTN | StartAddress, | |
IN UINTN | Size, | |||
OUT VOID * | Buffer | |||
) |
Reads a range of PCI configuration registers into a caller supplied buffer and saves the value in the S3 script to be replayed on S3 resume.
Reads the range of PCI configuration registers specified by StartAddress and Size into the buffer specified by Buffer. This function only allows the PCI configuration registers from a single PCI function to be read. Size is returned. When possible 32-bit PCI configuration read cycles are used to read from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit and 16-bit PCI configuration read cycles may be used at the beginning and the end of the range.
If StartAddress > 0x0FFFFFFF, then ASSERT(). If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). If Size > 0 and Buffer is NULL, then ASSERT().
StartAddress | Starting address that encodes the PCI Bus, Device, Function and Register. | |
Size | Size in bytes of the transfer. | |
Buffer | Pointer to a buffer receiving the data read. |
References ASSERT, PCILIB_TO_COMMON_ADDRESS, PciReadBuffer(), RETURN_SUCCESS, S3BootScriptSavePciCfgWrite(), and S3BootScriptWidthUint8.
Writes a 16-bit PCI configuration register and saves the value in the S3 script to be replayed on S3 resume.
Writes the 16-bit PCI configuration register specified by Address with the value specified by Value. Value is returned. This function must guarantee that all PCI read and write operations are serialized.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. | |
Value | The value to write. |
References InternalSavePciWrite16ValueToBootScript(), and PciWrite16().
Writes a 32-bit PCI configuration register and saves the value in the S3 script to be replayed on S3 resume.
Writes the 32-bit PCI configuration register specified by Address with the value specified by Value. Value is returned. This function must guarantee that all PCI read and write operations are serialized.
If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. | |
Value | The value to write. |
References InternalSavePciWrite32ValueToBootScript(), and PciWrite32().
Writes an 8-bit PCI configuration register and saves the value in the S3 script to be replayed on S3 resume.
Writes the 8-bit PCI configuration register specified by Address with the value specified by Value. Value is returned. This function must guarantee that all PCI read and write operations are serialized.
If Address > 0x0FFFFFFF, then ASSERT().
Address | Address that encodes the PCI Bus, Device, Function and Register. | |
Value | The value to write. |
References InternalSavePciWrite8ValueToBootScript(), and PciWrite8().
UINTN EFIAPI S3PciWriteBuffer | ( | IN UINTN | StartAddress, | |
IN UINTN | Size, | |||
IN VOID * | Buffer | |||
) |
Copies the data in a caller supplied buffer to a specified range of PCI configuration space and saves the value in the S3 script to be replayed on S3 resume.
Writes the range of PCI configuration registers specified by StartAddress and Size from the buffer specified by Buffer. This function only allows the PCI configuration registers from a single PCI function to be written. Size is returned. When possible 32-bit PCI configuration write cycles are used to write from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit and 16-bit PCI configuration write cycles may be used at the beginning and the end of the range.
If StartAddress > 0x0FFFFFFF, then ASSERT(). If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). If Size > 0 and Buffer is NULL, then ASSERT().
StartAddress | Starting address that encodes the PCI Bus, Device, Function and Register. | |
Size | Size in bytes of the transfer. | |
Buffer | Pointer to a buffer containing the data to write. |
References ASSERT, PCILIB_TO_COMMON_ADDRESS, PciWriteBuffer(), RETURN_SUCCESS, S3BootScriptSavePciCfgWrite(), and S3BootScriptWidthUint8.